Performance as a compile time property.
An exact-cycle computing stack: a VLIW CPU, a dataflow language, and a unikernel; all designed together so the compiler knows the cycle count before the program ever runs.
Write a program, compile it, and the compiler hands back the number of cycles it will take. Not a benchmark. Not a p99 taken over a thousand runs. The number.
How do we achieve that? By removing all the guessing. quartz has no caches, no branch predictor, no interlocks and no interrupts. phi has no garbage collector and no implicit ordering. carrier has no dynamic scheduler, and nothing sitting between a device and the code that reads it. Each layer gives up a mechanism that buys average-case speed at the price of predictability.
What comes back in exchange is timing as a fact about the program rather than a property of the run. Latency stops being something you measure after deployment and becomes something the build checks.
Performance as a compile time property
$ qasm build golden/101_uart_hello.qasm -o hello.qx
$ scope run hello.qx
hello, world94 cycles. Guaranteed by the compiler, not measured after the fact.
The processor
It never guesses.
A processor that does exactly what the compiler planned. It doesn’t try to predict what you’ll do next or keep a stash of what you might need — the tricks that make ordinary chips fast on average and ultimately unpredictable. Take the guesswork out and what’s left is a machine whose timing you can count on.
The language
Speed is enforced.
A language built on parallelism, with deterministic parallel execution as the target. No GC, no locking, no guessing. The compiler will statically schedule your code and produce exact cycle counts.
The operating system
Nothing in the way.
An operating system built into your program rather than sitting underneath it. Nothing stands between a piece of hardware and the code reading from it, and nothing decides at the last moment what runs next.
quartz runs with no non-deterministic runtime behaviour, so phi gets deterministic runtimes. The compiler knows the exact cycle length of every functional unit.
An exact-cycle unit — an XCU — that executes instructions with cycle times and latencies known in advance rather than measured after the fact.
When cycle counts are a compile-time property, a slowdown stops being a production surprise and starts being a broken build.
An easy way to put business logic on an FPGA that is neither an HDL nor HLS. Write phi, get snappy code, in the familiar environment of an OS.
| Component | What | Written in | State |
|---|---|---|---|
| quartz | The FPGA CPU | Clash | Mostly done |
| scope | The simulator | Rust | Finished |
| np | The nanopass framework | Rust | Finished |
| phi | The language | Rust | Specified, compiler in progress |
| carrier | The OS | — | Planned, unimplemented |